🗞️ Why in News The Centre notified Semicon 2.0, the next phase of the Semicon India Programme, on August 31, 2026. The programme carries a fiscal outlay of 1,27,500 crore rupees and is built on six pillars, widening India’s semiconductor policy beyond chip fabrication into design, equipment, materials, advanced packaging, research and talent.
What Changed, and Why the Change Is the Story
Semicon 1.0 was a fab-first programme. The India Semiconductor Mission was approved by the Union Cabinet in December 2021 with an incentive framework of 76,000 crore rupees, offering fiscal support of up to 50 per cent of project cost for silicon fabs, compound semiconductor facilities, assembly and testing units, and chip design.
Semicon 2.0 is an ecosystem programme. The outlay rises to 1,27,500 crore rupees and the money is deliberately spread across the whole value chain rather than concentrated on the most capital-intensive link in it.
The six pillars
| Pillar | What it covers |
|---|---|
| Design | Indigenous chip design and intellectual property |
| Machines and Materials | Semiconductor equipment and materials manufacturing |
| Fabs | Setting up more fabrication facilities |
| ATMP / OSAT | Assembly, Testing, Marking and Packaging; Outsourced Semiconductor Assembly and Test |
| Research and Development | The R&D layer beneath the manufacturing layer |
| Talent | Skilled workforce creation |
Learn the two acronyms properly, because they are examinable and constantly confused.
- ATMP is Assembly, Testing, Marking and Packaging: the back-end stage where a fabricated wafer becomes a usable packaged chip.
- OSAT is Outsourced Semiconductor Assembly and Test: the business model in which that back-end work is done by a third-party firm rather than by the chipmaker itself.
They describe the same part of the value chain, one as a process and one as an industry structure. A question that offers both as options is testing whether you know that.
Why “Design” Leads the List
This is the analytical point worth carrying into an answer.
India’s actual comparative advantage in semiconductors is design, not fabrication. A very large share of the world’s chip design engineering workforce already sits in India, working for global firms. What India historically lacked was ownership: the intellectual property, the product companies, and the fabs to turn a design into a domestic supply chain.
A fab-only policy does not fix that. A fabrication plant is enormously capital-intensive, depends on imported equipment and materials, and takes years to reach yield. Putting the entire incentive weight on fabs buys manufacturing capacity while leaving the design IP, the equipment and the materials still owned abroad.
Semicon 2.0’s structure is an admission of that. By funding design IP, equipment, materials and packaging alongside fabs, the programme targets the parts of the chain where India can plausibly own something, rather than only the part where it can host something.
What Semicon 1.0 Actually Delivered
Numbers matter more than adjectives here.
- 10 projects approved, with total investment of 1.60 lakh crore rupees, across 6 states, as of December 2025
- Fiscal support of up to 50 per cent of project cost under the 1.0 incentive framework
The honest reading. Ten approved projects across six states is a real base and a legitimate reason to fund a second phase. It is not yet a domestic supply chain, and the gap between an approved project and a chip shipping at commercial yield is exactly where semiconductor policy usually fails. Write the achievement and the gap in the same sentence and the answer scores.
The Strategic Frame
Semiconductors are the standing example of a chokepoint technology. Fabrication at advanced nodes is concentrated in a very small number of firms and geographies, and the equipment layer above it is more concentrated still. That concentration is why chip policy stopped being industrial policy and became security policy in most major economies.
India’s exposure is structural. Electronics is among the largest categories in India’s import bill, and a domestic electronics manufacturing base that imports its chips has substituted one dependency for another. The Production Linked Incentive schemes for electronics addressed assembly; Semicon addresses what goes inside.
The constraint nobody notifies away. Fabs need ultra-pure water, uninterrupted power, specialised gases and chemicals, and a supplier ecosystem within reach. Those are state-level infrastructure questions, not central-scheme questions, which is why the geography of approved projects clusters rather than spreads.
UPSC Relevance
GS Paper 3. Science and technology developments and their applications; indigenisation of technology; achievements of Indians in science and technology; effects of liberalisation on the economy, changes in industrial policy and their effects on industrial growth.
Cross-paper link to GS2. Semiconductor supply chains are a live foreign-policy instrument: export controls, friend-shoring arrangements and technology partnerships all run through them. An answer that treats Semicon purely as industrial policy misses the international relations half.
A Mains question worth preparing. “India’s semiconductor strategy has moved from fabrication-led incentives to an ecosystem approach. Examine the reasoning behind this shift and the challenges that remain. (250 words)”
Prelims focus. The 1,27,500 crore outlay and the six pillars; the 76,000 crore ISM 1.0 framework and its December 2021 approval; the up-to-50-per-cent support level; the ATMP and OSAT expansions; and the count of approved projects and states.
📌 Facts Corner — Knowledgepedia
Semicon 2.0:
- Semicon 2.0, the next phase of the Semicon India Programme, was notified on August 31, 2026.
- Its fiscal outlay is 1,27,500 crore rupees.
- It is built on six pillars: design, machines and materials, fabs, ATMP/OSAT, R&D and talent.
- It widens chip policy beyond fabrication into design IP, equipment, materials and packaging.
India Semiconductor Mission 1.0:
- ISM 1.0 was approved by the Union Cabinet in December 2021.
- Its incentive framework was 76,000 crore rupees.
- It offered fiscal support of up to 50 per cent of project cost.
- It covered silicon fabs, compound semiconductor facilities, assembly and testing units, and chip design.
- As of December 2025, 10 projects worth 1.60 lakh crore rupees were approved across 6 states.
Terminology:
- ATMP stands for Assembly, Testing, Marking and Packaging.
- OSAT stands for Outsourced Semiconductor Assembly and Test.
- ATMP names a process stage; OSAT names a third-party industry model for that stage.
Other Relevant Facts:
- Semiconductor fabrication at advanced nodes is concentrated in very few firms and geographies.
- Electronics is among the largest categories in India’s import bill.
- Production Linked Incentive schemes for electronics addressed assembly, not chip fabrication.
- Fabs require ultra-pure water, uninterrupted power and specialised gases and chemicals.
Sources: PIB, India Semiconductor Mission, Business Today
Source: Semicon 2.0 Notified: A 1,27,500 Crore Bet on Everything Except the Fab Alone — Ujiyari.com | Free UPSC & State PCS Current Affairs
