The Lift Line

Decisions about where the next fabs, and the supplier bases around them, will sit are being made now, not in 2029. (Ajit Manocha)

Why This Editorial Matters for Your Exam

Semiconductor policy sits at the intersection of industrial strategy, technology self-reliance, supply-chain resilience and great-power geopolitics. The examination will not ask you to name a fab; it will ask you to explain why India is building them and what the country still lacks to make them succeed. That is an ecosystem argument, and Semicon 2.0 is the frame in which it will be tested.

GS Paper 3: Indian economy, industrial policy; science and technology; indigenisation of technology; supply-chain resilience and strategic industries.

GS Paper 2: Government policies and interventions in various sectors, issues arising out of their design and implementation.

Concept Meaning Why it is testable
Fab Wafer fabrication plant, the front-end of chip making Capital-intensive, long lead time; ISM 1.0 approved one silicon fab, one SiC fab and one GaN/micro-LED display fab
OSAT / ATMP Outsourced Semiconductor Assembly and Test / Assembly, Testing, Marking and Packaging India’s near-term strength; nine of the 12 approved ISM units are packaging units
DLI Scheme Design-Linked Incentive under the Semicon India Programme Funds Indian chip design start-ups; tape-out milestones matter
Tape-out Final design handed to a foundry for silicon manufacture The point at which a design becomes a chip

Background and Context

The policy, as of 2026. Semicon 2.0, the next phase of the Semicon India Programme, was approved by the Union Cabinet on 15 July 2026 and notified on 31 August 2026, with an outlay of Rs 1,27,500 crore spread across six pillars: design, machines and materials, fabs, ATMP/OSAT, R&D and talent. Ujiyari covered the notification in Semicon 2.0 Notified. It succeeds the India Semiconductor Mission (ISM), approved in December 2021 with Rs 76,000 crore.

What is scheduled for 17 September. Prime Minister Narendra Modi is scheduled to inaugurate the SEMICON India 2026 expo (17 to 19 September, Yashobhoomi, New Delhi). Manocha’s column describes this as the “scheduled launch of Semicon 2.0 on Sept 17”; that is his wording. The policy itself was already approved and notified, as set out above.

The base built by ISM 1.0 (context, as of 2026). As of July 2026, 12 units had been approved with investment of over Rs 1.64 lakh crore: one silicon fab, one silicon carbide (SiC) fab, one GaN/micro-LED display fab and nine assembly and packaging (OSAT/ATMP) units. The Tata Electronics-PSMC 300mm silicon fab at Dholera, Gujarat (about Rs 91,000 crore) is under construction. Micron’s ATMP at Sanand, Gujarat has been producing since 28 February 2026 (background: it was the first ISM approval). Packaging units include Tata Electronics at Jagiroad, Assam, CG Power-Renesas and Kaynes Semicon at Sanand, and the HCL-Foxconn unit at Jewar, Uttar Pradesh. On the design side, the Design-Linked Incentive (DLI) scheme supports Indian chip design start-ups.

The demand pressure. Manocha cites SEMI’s World Fab Forecast data: the industry will need more than 50 new fabs between 2029 and 2035 to support the build-out of AI infrastructure.

The funding signal. Economic Times reporting carried with the column puts equity funding raised by Indian semiconductor start-ups at about USD 1.4 billion, roughly half of it since 2025. That is start-up equity, not total investment in plants.

The nodal architecture. The programme sits under MeitY, implemented by the India Semiconductor Mission.

The Analysis

1. The two-to-three year window (Manocha’s argument). Manocha’s core claim is about timing: AI is resetting the scale of demand, the siting of more than 50 new fabs and their supplier bases is being decided now, and India has two to three years to turn policy into permits, land, power, water and qualified suppliers. Ecosystems are not built in a single policy cycle, and first movers shape the next decade. The question, he writes, is not only what to build but “how fast and with whom”.

2. Beyond volume (Manocha’s argument). He does not dismiss assembly and packaging: at scale they create jobs and capacity, and both are worth building. But the layers above them, process technology, equipment, materials and semiconductor IP, are what turn a manufacturing location into an architect of the industry. India has the talent to compete there; sequencing and speed will decide how quickly it does.

3. The building blocks move together (Manocha’s argument). Semicon 2.0, in his reading, names the right building blocks: fabs backed by execution certainty, machines and materials with enabling industries (equipment, chemicals, gases, precision manufacturing), commercial IP on India’s design base, OSAT/ATMP and advanced packaging, R&D for process and integration know-how, and talent at scale. Each is necessary; none is sufficient on its own.

4. Ujiyari analysis: a fab without its supply base is a stranded asset. A wafer fab that imports its equipment, gases, chemicals and photoresists keeps domestic value addition low, and its strategic-autonomy claim fails at the first supply shock. This is why the machines and materials pillar deserves the same seriousness as the fab pillar.

5. Ujiyari analysis: packaging is a foothold, not the destination. Advanced packaging (2.5D and 3D integration, chiplets, heterogeneous integration) is where a growing share of chip value is migrating, and its cycle times are shorter than a greenfield fab’s. The synopsis of Manocha’s piece calls advanced packaging a key opportunity for India to gain market share this decade. The exam-ready balance: packaging is a legitimate position to build from, while Manocha’s warning is that stopping at volume would leave India a location rather than an architect.

6. Ujiyari analysis: talent and IP are the choke points. India’s design base is large, but fab operations need different skills: process integration, lithography, yield engineering, metrology and contamination control. Semicon 2.0’s talent pillar will be tested on whether it builds these, including through exchanges with equipment makers such as ASML, Applied Materials, Tokyo Electron and Lam Research. On IP, linking a share of design incentives to tape-outs and foundry access is the lever that turns designs into owned silicon.

7. The counter-view deserves a serious answer. The case for specialising in design, verification and embedded software instead of fabs is not frivolous. The response is that a design ecosystem detached from any manufacturing base stays captive to the manufacturer, and in an era when semiconductors are strategic goods, capability without some manufacturing depth is capability at somebody else’s discretion.

Data and Institutions Vault

Prelims-grade facts:

The policy:

  • India Semiconductor Mission (ISM) approved in December 2021 with an outlay of Rs 76,000 crore.
  • Semicon 2.0: Cabinet approval on 15 July 2026 and notification on 31 August 2026 (background, as of 2026).
  • Semicon 2.0 outlay: Rs 1,27,500 crore across six pillars: design, machines and materials, fabs, ATMP/OSAT, R&D, talent.
  • SEMICON India 2026 expo: 17 to 19 September 2026, Yashobhoomi, New Delhi; the Prime Minister is scheduled to inaugurate it.
  • Nodal ministry: MeitY. Implementing body: India Semiconductor Mission (ISM).

The projects (ISM 1.0, as of 2026):

  • 12 units approved, investment over Rs 1.64 lakh crore (as of July 2026).
  • Mix: 1 silicon fab, 1 SiC fab, 1 GaN/micro-LED display fab, 9 OSAT/ATMP packaging units.
  • Tata Electronics-PSMC 300mm silicon fab, Dholera, Gujarat (about Rs 91,000 crore).
  • Micron ATMP, Sanand, Gujarat: in production (background: since 28 February 2026).
  • Packaging units include Tata Electronics (Jagiroad, Assam), CG Power-Renesas and Kaynes Semicon (Sanand), HCL-Foxconn (Jewar, UP).

The demand backdrop:

  • SEMI World Fab Forecast data: more than 50 new fabs needed between 2029 and 2035 for AI infrastructure build-out.
  • Indian semiconductor start-ups: about USD 1.4 billion in equity funding, roughly half of it since 2025.
  • Manocha: India has two to three years to turn policy into permits, land, power, water and qualified suppliers.
  • SEMI: Semiconductor Equipment and Materials International; Ajit Manocha is its president and CEO.

The ecosystem building blocks (as Manocha lists them):

  • Fabs backed by execution certainty for investors.
  • Machines, materials and enabling industries: equipment, chemicals, gases, precision manufacturing.
  • Commercial semiconductor IP built on India’s design base.
  • OSAT/ATMP and advanced packaging.
  • R&D anchoring process and integration know-how.
  • Talent development at scale.

⚠️ Watch the trap: Semicon 2.0 was approved in July and notified in August 2026; 17 September 2026 is the SEMICON India expo, not the policy’s approval date. And do not write that ISM 1.0 is mostly fabs: nine of its 12 approved units are packaging units.

The Debate

FOR (build the full ecosystem, including fabs): Semiconductors are strategic goods. A country of India’s size and geopolitical position cannot rely permanently on fabrication in Taiwan, South Korea and China. The subsidies are large, but staying a design and assembly base for others is more expensive strategically, and the AI build-out opens a window that will not stay open.

AGAINST (specialise in design and packaging): Fab economics are punishing, cycles are brutal, and small ecosystems have been hurt in downturns. India’s proven advantage is in design and verification. Focus capital there and on packaging, and leave leading-edge fabrication to established hubs in Taiwan, South Korea, the US and Japan.

Balanced verdict: The debate is not fabs versus design; it is depth. Design without a manufacturing anchor stays captive; fabrication without equipment and materials becomes assembly with extra steps. As Manocha puts it, each building block is necessary and none is sufficient on its own.

How to Think About This

Locate every semiconductor claim on a value chain: design and IP; wafer fabrication (front-end); assembly, test and packaging (back-end); equipment, chemicals and gases; end-application markets. Ask which of these India owns, which it is building, and which it depends on entirely. The honest map, a large design base, packaging at scale, fabrication under construction, and thin equipment and materials capacity, is more useful than a headline investment number.

Aspirant’s Desk

For a Mains answer, use the vocabulary this debate establishes: ecosystem, not policy; execution certainty, not intent; beyond volume; tape-out milestones, not incentive counts. Anchor with precise facts: ISM approved in December 2021 with Rs 76,000 crore; 12 units and over Rs 1.64 lakh crore (as of July 2026), nine of them packaging; Semicon 2.0 at Rs 1,27,500 crore across six pillars; SEMI’s projection of more than 50 new fabs between 2029 and 2035 for AI infrastructure; and project locations by state (Dholera, Sanand, Jagiroad, Jewar). Structure the body around the six pillars, and close with the ecosystem test rather than the fab count. For an interview, be ready to defend or challenge the case for domestic fabs on capital intensity and strategic autonomy grounds; clarity of reasoning matters more than the side you choose.

Sources: Economic Times, ET Commentary, Ajit Manocha

Source: Semicon 2.0: From Participating in the Chip Value Chain to Shaping It — Ujiyari.com | Free UPSC & State PCS Editorial Analysis