Why in News: Netrasemi: a Thiruvananthapuram-based fabless semiconductor startup backed by Zoho Corporation: unveiled its flagship edge AI System-on-Chip (SoC) named A2000 on May 28, 2026. The chip integrates an in-house Neural Processing Unit (NPU), a vision processor, an Image Signal Processor (ISP), and crypto accelerators, targeted at smart cameras, edge AI boxes, and intelligent video gateways. Fabricated by TSMC on a 12nm process node, the chip is among the first four startups in India to receive ₹15 crore support under MeitY’s Design Linked Incentive (DLI) Scheme. The launch marks a milestone in India’s “design-in-India, fab-abroad” interim semiconductor model.
What is an Edge AI SoC?
An edge AI SoC is a single-die integrated chip that performs AI inference (running neural-network models) locally on a device (camera, gateway, vehicle) instead of streaming data to a cloud server. Critical for:
- Latency-sensitive use cases: real-time object detection, autonomous vehicles, industrial robotics.
- Bandwidth + cost: avoids continuous cloud upload.
- Privacy: sensitive data (CCTV streams, biometric matches) stays on-device.
- Reliability: works without network connectivity.
A2000 reportedly delivers trillions of operations per second (TOPS) for vision-based AI tasks while operating within a single-digit-watt power envelope, typical for edge applications.
Netrasemi’s Place in India’s Semiconductor Stack
India’s semiconductor ecosystem is built around three layers: design, fabrication, and assembly/test/packaging (ATMP). Netrasemi sits firmly in the design layer (“fabless”).
| Layer | What it does | India’s status |
|---|---|---|
| Design (fabless) | Designs the chip architecture, IP cores, NPU, ISP, etc. | ~20% of global chip-design talent is in India; ~2,500 chips/year designed in India |
| Fabrication (foundry) | Etches the silicon wafer, needs sub-7nm capability | No commercial sub-7nm fab in India; Tata Electronics + PSMC Dholera (28nm/45nm/55nm) under construction, production ~2026-27 |
| ATMP (assembly, test, packaging) | Packages the die into the final chip | Tata at Jagiroad (Assam); Micron at Sanand (Gujarat); CG Power at Sanand; 3DGS + Odisha (MoU late May 2026) for advanced packaging |
The A2000 was designed in India but fabricated at TSMC, Taiwan: the prevailing “design here, fab there” interim model.
India Semiconductor Mission (ISM): Architecture
| Component | Detail |
|---|---|
| Launched | December 21, 2021 (Cabinet approval) |
| Implementing agency | India Semiconductor Mission (ISM): a Special Independent Business Division under Digital India Corporation, MeitY |
| Total outlay | ~₹76,000 crore (~USD 10 billion) (ISM 1.0) |
| Sub-schemes | (i) Semi Fab; (ii) Display Fab; (iii) Compound Semiconductors / Silicon Photonics / Sensor Fab / Discrete Semiconductors / ATMP; (iv) Design Linked Incentive (DLI) Scheme |
| DLI Scheme | Up to ₹15 crore per startup for chip design (Product Design Linked Incentive + Deployment Linked Incentive); managed by C-DAC |
| ISM 2.0 (Budget 2026-27) | ~₹1,000 crore allocation; targets 70-75% semiconductor self-sufficiency by 2029 and 3nm/2nm advanced fab capability by 2035 |
Approved Projects under ISM (key)
| Project | Location | Tech | Investment |
|---|---|---|---|
| Tata Electronics + PSMC | Dholera, Gujarat | 28nm fab | ~₹91,000 crore |
| Tata Electronics ATMP | Jagiroad, Assam | ATMP | ~₹27,000 crore |
| Micron Technology | Sanand, Gujarat | DRAM ATMP | ~₹22,500 crore |
| CG Power + Renesas + Stars Microelectronics | Sanand, Gujarat | ATMP | ~₹7,600 crore |
| Kaynes Semicon | Sanand, Gujarat | OSAT | ~₹3,300 crore |
| 3DGS + Odisha (May 2026 MoU) | Odisha | Advanced packaging (substrate) | Under development |
Netrasemi A2000: Specs (announced)
| Component | Detail |
|---|---|
| Process node | 12 nm at TSMC |
| Integrated blocks | NPU + Vision Processor + ISP + Crypto Engines |
| Target markets | Smart cameras, edge AI boxes, intelligent video gateways, ATMs, smart retail |
| Key competitors | Ambarella (US), Hailo (Israel), Kneron (Taiwan), HiSilicon (China, sanctioned) |
Why It Matters for India
- Strategic-tech sovereignty: Edge AI chips are dual-use (defence surveillance + commercial CCTV).
- AI sovereignty: India’s IndiaAI Mission (₹10,372 crore, March 2024) depends on indigenous chip pipeline.
- DPI export: India-built edge AI chips can power Global South digital infrastructure (Aadhaar-style platforms, drone surveillance, smart cities).
- Talent retention: India’s chip-design talent has historically migrated to Bengaluru offices of foreign giants (Intel, AMD, Qualcomm, NVIDIA); startups like Netrasemi keep talent here.
- Reducing single-country dependence: Netrasemi’s chip is fabbed at TSMC Taiwan; geopolitical risk on Taiwan Strait makes Indian fabs essential, even at older nodes.
Open Questions
- Production scale: A2000’s volume targets and commercial customers (announced or expected) were not disclosed.
- Performance benchmarks: exact TOPS rating, accuracy on standard ML benchmarks (ImageNet, COCO) not yet third-party verified.
- Software stack: does Netrasemi support standard frameworks (TensorFlow Lite, ONNX Runtime, PyTorch Mobile)? Edge AI adoption depends heavily on developer tooling.
- Sub-7nm trajectory: A2000 at 12nm is a starting point; cutting-edge inference (LLMs, large vision models) needs 5nm or below.
UPSC Relevance
| Paper | Relevance |
|---|---|
| GS3 | Semiconductors, edge AI, dual-use technology, indigenisation, supply-chain resilience, defence-tech ecosystem |
| Mains | “Examine India’s interim ‘design-in-India, fab-abroad’ semiconductor model. What are the structural reforms needed to move toward indigenous fabrication?” |
| Prelims | ISM launch date (Dec 21, 2021), DLI scheme (₹15 cr per startup), Tata-PSMC Dholera (28nm), Jagiroad Assam, IndiaAI Mission (₹10,372 cr, March 2024), Netrasemi (Kerala, Zoho-backed), TSMC (Taiwan) |
Facts Corner
India Semiconductor Mission:
- Approved: December 21, 2021 (Cabinet)
- Total outlay: ~₹76,000 crore (~USD 10 bn) (ISM 1.0)
- ISM 2.0 (Budget 2026-27): ~₹1,000 crore
- Implementing agency: India Semiconductor Mission (ISM) under Digital India Corporation, MeitY
- 4 sub-schemes including Design Linked Incentive (DLI): up to ₹15 crore per startup
- Targets: 70-75% self-sufficiency by 2029; 3nm/2nm capability by 2035
Major Projects Approved:
- Tata Electronics + PSMC (Powerchip Taiwan): Dholera (Gujarat), 28nm fab, ₹91,000 cr
- Tata Electronics ATMP: Jagiroad (Assam), ₹27,000 cr
- Micron Technology: Sanand (Gujarat), DRAM ATMP, ₹22,500 cr
- CG Power + Renesas + Stars Microelectronics: Sanand (Gujarat), ATMP, ₹7,600 cr
- Kaynes Semicon: Sanand (Gujarat), OSAT, ₹3,300 cr
- 3DGS + Odisha: Advanced packaging MoU (May 2026)
Netrasemi A2000:
- Fabless designer based in Thiruvananthapuram, Kerala (Zoho-backed)
- A2000 chip: 12nm, fabbed at TSMC
- Integrates NPU + vision processor + ISP + crypto engines
- Target: smart cameras, edge AI boxes, video gateways
- One of first 4 startups under MeitY DLI Scheme (₹15 cr)
India’s AI Ecosystem:
- IndiaAI Mission: ₹10,372 crore, approved March 2024
- Includes 10,000+ GPUs, application development, datasets
- Linked to IndiaAI Compute Capacity + AIKosh datasets platform
Global Edge AI Players:
- Ambarella (US), Hailo (Israel), Kneron (Taiwan), HiSilicon (China, under US sanctions)
- India’s entry: Netrasemi, Saankhya Labs, Signalchip, Mindgrove, InCore
Cite this page: Netrasemi Launches A2000, India-Designed Edge AI System-on-Chip — Ujiyari.com | Free UPSC & State PCS Current Affairs
